A Novel Technique to Enhance Security of Logic Circuits Using a Modified Programmable Secured Logic Module

Field Programmable Gate Arrays (FPGAs) are devices used in many VLSI applications, which are programmable in nature. Researchers had proposed various threat models like bit stream copying, unauthorized usage of FPGA systems etc. The problem of bit-stream copying can be avoided by incorporating cryptographic techniques. This not only increases FPGA system security, but increases complexity and cost of the system. For this reason, use of FPGA is not viable for low cost, less complex systems as cryptographic techniques increases cost and complexity of the system. This paper proposes a new technique which enhances security of digital systems and design of a programmable logic module for secured systems which works on the principle of the new technique. The idea is to load the logic module with a default functionality which is changed at run time. FPGAs consist of an array of Look-Up Tables (LUTs) as the programmable element with a routing network which consumes majority of resources in FPGAs. Multiplexer Input lines forms the control word of the LUT and select inputs of the multiplexer can be used as input lines of the LUT. Width of the control word of a LUT with N inputs is 2N bit and total number of elements in the set of possible control words is 2M where M=2N.